How to Use EDA Playground to Plan and Execute Large-Scale Verification Projects

 

EDA Playground is an online platform that allows engineers to run and test their code in real time. It is also a tool to help build and manage large scale verification projects.

Verification Cockpit (VC) is an integrated suite of tools to plan, execute, and optimize large-scale verification tasks – from planning and initial design, through testbench design, code analysis, and reporting. VC offers a holistic, centralized data model that connects verification tools across the entire design flow to enable better decision support and faster on-going operation of large-scale 검증놀이터 processes.

Email Signup & Password Reset Testing

A common practice in many modern applications is to have users sign-up for an account using a random email address and password. Usually, these systems use a form element with a clear HTML name attribute to identify the user and verify their email address. You can use the MailSlurp Playground app to simulate email signup and password reset using these same techniques.

Copy a playground and Share it with others

When viewing a playground that you have saved, a button will show up in the top left corner. Clicking this will create a new, complitely separate playground with a link that can be shared with others.

The link will open a browser-based wave viewer called EPWave that allows you to view the waves produced by your simulation. Unlike other wave viewers, EPWave supports all signals and enables you to search the resulting files by signal number, name, or component type.

Specify a file to be used for the playground

You can upload files to the EDA Playground server, including source code and text files. The files may be HDL source files, or text files to be used as inputs to the testbench and design. These files can have a maximum of 1,000,000 characters.

Specify the language and libraries for the code to be run

A selection of simulators are available from the Tools & Simulators menu, as well as the coding languages (Verilog, SystemVerilog, UVM, VHDL, and C++/SystemC). Some simulators require you to supply additional identifier information when running code with them.

Choose the top entity for your code to run

Choosing the top entity of a design in a simulator is often a critical step when generating the results from a simulation. For example, when a logical gate is simulated in an HDL design using Yosys Cicruit Diagrams, the top entity of the logical gate must be specified before the simulation begins.